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advance data sheet march 1997 L7597 resistive subscriber line interface circuit (slic), ring relay, and protector (srp) for short loop and ta-909 applications features n low-power scan mode for low on-hook power dis- sipation (40 mw) n low active power dissipation (125 mw max) n distortion-free, on-hook transmission n eight operating states via latched parallel data inputs with channel select feature n battery switch for dual power supply operation n precision ?ed 25 ma current limiter n integrated protection n no external protection device required n integrated ringing access relay n ring trip detector n loop closure detector with hysteresis n relay driver n battery noise cancellation n thermal protection n 32-pin, surface-mount, plastic package (plcc) description the L7597 is a resistive subscriber line interface circuit (slic) that is optimized for short loop applica- tions, such as bellcore ta-nwt-000909 require- ments for the ?er-in-the-loop (fitl) applications. it interfaces with the low-voltage circuits on an analog line card to the tip/ring subscriber loop. the L7597 does not supply dc current to the subscriber loop; external resistors are used for this purpose. included in the L7597 are a solid-state ringing access switch and a line break switch. also included is a relay driver for an external (test) access mechan- ical relay. state control is via four latched parallel data inputs. a chip select feature allows the user to enable, disable, or rest the data latches to a known logic state. the L7597 offers a low-power scan state to minimize power to less than 40 mw in the on-hook state. the active power is also very low (<125 mw). the L7597 also supports on-hook transmission; however, power dissipation will be higher (<700 mw) in the on-hook transmission state. to minimize the off-hook power that is dissipated in the subscriber loop, the L7597 also offers a battery switch feature. the high-voltage battery is applied during an on-hook condition, to maintain compatibil- ity with any preexisting standards. in an off-hook con- dition, the battery is switched via a logic input to a lower-voltage auxiliary battery, thus minimizing off- hook power dissipation. because the battery is switched via an external logic control, the battery switch is only suited for applications where the lower- voltage battery is suf?ient to drive the loop; i.e., short loop applications. current is limited to a ?ed value of 25 ma by an internal precision current-limit circuit. because of the internal architecture of the L7597 slic and because of the power rating of the associ- ated external feed resistors, the L7597 will meet most surge requirements without use of an external sec- ondary protection device. internal circuitry steers both positive and negative faults to fault ground. neg- ative faults are not dumped into the battery. the L7597 is a chip line interface solution package in a single 32-pin plcc package. the tip and ring drive ampli?rs, the xmt ampli?r, the receive inter- face, and battery noise cancellation circuits are fabri- cated in a 90 v complementary bipolar (cbic) process. the ring access switch, line break switch, battery switch, current limit, protection functions, supervision, and control functions are fabricated in a 320 v dielectrically isolated bipolar-cmos-dmos (bcdmos) process. the device is available in a 32-pin plcc package.
2 lucent technologies inc. advance data sheet march 1997 relay, and protector (srp) for short loop and ta-909 applications L7597 resistive subscriber line interface circuit (slic), ring table of contents contents page features .................................................................................................................................................................... 1 description ................................................................................................................................................................ 1 architectural diagram ................................................................................................................................................ 4 pin information .......................................................................................................................................................... 5 absolute maximum ratings (@ t a = 25 c) .............................................................................................................. 7 electrical characteristics ........................................................................................................................................... 8 ring trip detector ................................................................................................................................................... 9 battery feed ........................................................................................................................................................... 9 fault protection ..................................................................................................................................................... 10 analog signal pins................................................................................................................................................ 11 transmission characteristics ................................................................................................................................ 13 data interface and logic....................................................................................................................................... 14 switch characteristics........................................................................................................................................... 15 operating states...................................................................................................................................................... 16 scan state ............................................................................................................................................................ 16 disconnect state................................................................................................................................................... 17 talk/high battery state ......................................................................................................................................... 17 talk state .............................................................................................................................................................. 17 scan current-limit state....................................................................................................................................... 17 ringing state ........................................................................................................................................................ 17 on-hook transmission state ................................................................................................................................ 17 intermediate talk state ......................................................................................................................................... 17 applications ............................................................................................................................................................. 18 general ................................................................................................................................................................. 18 resistor module .................................................................................................................................................... 21 protection.............................................................................................................................................................. 23 tip/ring drivers .................................................................................................................................................... 24 receive interface .................................................................................................................................................. 24 transmit interface.................................................................................................................................................. 24 battery noise cancellation ................................................................................................................................... 24 on-hook transmission.......................................................................................................................................... 25 parallel data interface........................................................................................................................................... 25 supervision ........................................................................................................................................................... 25 off-hook detection ............................................................................................................................................... 25 ring trip ................................................................................................................................................................ 25 thermal shutdown................................................................................................................................................ 26 relay driver .......................................................................................................................................................... 26 solid-state ringing access................................................................................................................................... 26 battery switch....................................................................................................................................................... 26 dc characteristics .................................................................................................................................................... 27 v-i characteristics................................................................................................................................................. 27 loop length .......................................................................................................................................................... 27 ac design................................................................................................................................................................. 27 codec features and selection summary ............................................................................................................. 27 design equations.................................................................................................................................................. 28 ta-909 application diagram .................................................................................................................................... 32 outline diagram....................................................................................................................................................... 33 32-pin plcc ......................................................................................................................................................... 33 ordering information................................................................................................................................................ 34
lucent technologies inc. 3 advance data sheet march 1997 relay, and protector (srp) for short loop and ta-909 applications L7597 resistive subscriber line interface circuit (slic), ring table of contents (continued) tables page table 1. pin descriptions ........................................................................................................................................... 5 table 2. operating conditions and powering ............................................................................................................ 8 table 3. ring trip detector ........................................................................................................................................ 9 table 4. battery feed ................................................................................................................................................ 9 table 5. electrical characteristics of pins pt, pr, and v bf ..................................................................................... 10 table 6. loss of power supplies.............................................................................................................................. 11 table 7. analog signal pins..................................................................................................................................... 11 table 8. ac transmission characteristics................................................................................................................. 13 table 9. logic inputs (ce, cs, and b0?3) and output nstat ............................................................................ 14 table 10. timing requirements (b0?3 and cs) .................................................................................................. 14 table 11. relay driver (rdo) .................................................................................................................................. 14 table 12. battery switch (sw1) and ring break switch (sw2) .............................................................................. 15 table 13. ringing access switch (sw3) ................................................................................................................. 15 table 14. input state coding ................................................................................................................................... 16 table 15. external components required............................................................................................................... 20 table 16. mmc * a31a8574aa and mmc a11a8574aa module ............................................................................ 22 figures page figure 1. architectural diagram................................................................................................................................. 4 figure 2. pin layout .................................................................................................................................................. 5 figure 3. switch on-state v-i characteristics sw1 and sw2................................................................................. 16 figure 4. switch on-state v-i characteristics sw3................................................................................................. 16 figure 5. external components required ............................................................................................................... 19 figure 6. resistor network...................................................................................................................................... 22 figure 7. L7597 slic matching requirements ....................................................................................................... 23 figure 8. implementing the noise cancellation function........................................................................................ 24 figure 9. ring trip threshold .................................................................................................................................. 25 figure 10. equivalent complex terminations .......................................................................................................... 28 figure 11. initial ac interface for complex termination between L7597 slic and t7504 codec .......................... 29 figure 12. revised ac interface c t and c r combined into a single capacitor c s ................................................. 30 figure 13. addition of resistor r sc from xmt to irp ............................................................................................. 30 figure 14. ta-909 application diagram ................................................................................................................... 32 * mmc is a registered trademark of microelectronic modules corporation.
4 lucent technologies inc. advance data sheet march 1997 relay, and protector (srp) for short loop and ta-909 applications L7597 resistive subscriber line interface circuit (slic), ring architectural diagram 12-3330.b (f) figure 1. architectural diagram +5 a v bath tip current driver + ax v xmt relay driver rdo v cca agnd +5 a +5 d dgnd v dd ce cs b0 b1 b2 b3 data interface, latches, and logic 2 nlc switch control nrt receive interface & battery noise cancellation +5 a v bath ring current driver protect sw2 50 w protect fgnd v bf v bath v bath current limiter v batl clim switchhook detector v xmt nlc nrt ring trip detector sw1 50 w rts rsw sw3 gto v rng cbn rgbn rcvn ircv nstat pr pt xmt ts rs
lucent technologies inc. 5 advance data sheet march 1997 relay, and protector (srp) for short loop and ta-909 applications L7597 resistive subscriber line interface circuit (slic), ring pin information 12-3331.a (c) figure 2. pin layout table 1. pin descriptions pin symbol type name/function 1 ircv i receive signal input (+). the differential current ?wing from pt to pr is 200 times the current ?wing into ircv. 2v cca +5 volt analog dc supply. +5 v supply for analog circuitry. 3 cbn i battery noise capacitor. the current ?wing out of pr is ?00 times the voltage applied to cbn divided by the impedance connected between rgbn and agnd. connect a capacitor from cbn to v bf to eliminate battery noise from the tip/ring. 4 rgbn i battery noise gain resistor. the current ?wing out of pr is 100 times the current ?wing into rgbn. connect a resistor from rgbn to agnd to set the gain of the battery noise cancellation circuit. 5 agnd analog ground. ground return for analog circuitry. 6 n s tat o not loop status. when low, this logic output indicates either a ring trip or an off- hook condition, depending on the input state of the slic. 7cs i channel select. a low-to-high transition on this logic input stores the data on pins b0?3 into the input latches on the slic. 8b3 i bit 3. b0?3 determine the state of the slic. see operating states. 9b2 i bit 2. b0?3 determine the state of the slic. see operating states. 10 b1 i bit 1. b0?3 determine the state of the slic. see operating states. 11 b0 i bit 0. b0?3 determine the state of the slic. see operating states. v cca v bath agnd v batl clim pt pr 5 7 8 9 10 11 12 13 14 15 6 4 3 2 1 32 31 16 18 19 20 17 30 27 26 25 24 23 22 21 28 29 xmt fgnd cs nstat agnd b3 b1 b2 rdo dgnd rts b0 ce v dd ts rs v bath v rng rsw v bf rcvn ircv cbn v cca rgbn L7597aau
6 lucent technologies inc. advance data sheet march 1997 relay, and protector (srp) for short loop and ta-909 applications L7597 resistive subscriber line interface circuit (slic), ring pin information (continued) table 1. pin descriptions (continued) * on the printed-wiring board (pwb), make the leads to fgnd and v bf as wide as possible for thermal and electrical reasons. also, maximize the amount of pwb copper on all leads connected to this device for the lowest operating temperature. pin symbol type name/function 12 ce i channel enable. a low on this logic input resets latches b0?3 to the 1111 state and disables the channel select input cs. a high on this logic input enables the channel select input cs. 13 v dd +5 volt digital dc supply. +5 v supply for logic and switch circuitry. 14 dgnd digital ground. ground return for v dd and the relay driver. 15 rdo o relay driver. this output drives an external relay. 16 rts i ring trip sense. sense input for the ring trip detector. 17 rsw o ringing access switch. ringing relay connects this pin to pin vrng (ringing supply). connect this pin to pin v bf through a 600 w current-limiting resistor. 18 v rng ringing supply voltage . connect this pin to the ringing supply. 19 v bath high of?e battery supply. most negative high-voltage power supply. 20 v bf * feed resistor battery supply. negative battery and ringing supply for the loop. con- nect this pin to the ring of the loop through a 200 w battery feed resistor. 21 fgnd* fault ground. ground return which carries the fault current when the fault protection is operated. 22 pr i/o protected ring. the input to the ring fault protection and output of ring current drive ampli?r (via the ring access switch). connect this pin to the ring of the loop through a 1 k w overvoltage protection resistor. 23 pt i/o protected tip. the input to the tip fault protection and output of tip current drive ampli- ?r. connect this pin to the tip of the loop through a 1 k w overvoltage protection resis- tor. 24 clim i current-limiter capacitor. connect a 0.1 m f capacitor from this pin to pin v bf . 25 v batl low of?e battery supply. least negative high-voltage power supply. 26 agnd analog ground. ground return for analog circuitry. 27 v cca +5 volt analog dc supply. +5 v supply for analog circuitry. 28 v bath high of?e battery supply. most negative high-voltage power supply. 29 xmt o transmit signal output. transmit ampli?r output to codec. 30 ts i tip sense. negative (? input of transmit op amp. connect one high-value resistor between ts and the tip of the loop and another high-value resistor between ts and xmt. 31 rs i ring sense. positive (+) input of the transmit op amp. connect one high-value resistor between rs and the ring of the loop and another high value resistor between rs and agnd. 32 rcvn i receive signal input (?. the differential current ?wing from pt to pr is ?00 times the voltage applied to rcvn divided by the impedance connected between ircv and agnd.
lucent technologies inc. 7 advance data sheet march 1997 relay, and protector (srp) for short loop and ta-909 applications L7597 resistive subscriber line interface circuit (slic), ring absolute maximum ratings (@ t a = 25 c) stresses in excess of the absolute maximum ratings can cause permanent damage to the device. these are abso- lute stress ratings only. functional operation of the device is not implied at these or any other conditions in excess of those given in the operational sections of the data sheet. exposure to absolute maximum ratings for extended periods of time can adversely affect device reliability. notes: analog voltages (v cca , v bath , and v batl ) are referenced to agnd and digital (logic) voltages (v dd ) are referenced to dgnd. the ic can be damaged unless all ground connections are applied before, and removed after, all other connections. furthermore, when power- ing the device, the user must guarantee that no external potential creates a voltage on any pin of the device that exceeds the device ratings. for example, inductance in a supply lead could resonate with the supply ?ter capacitor to cause a destructive overvoltage. parameter symbol min typ max unit +5 v dc supplies v cca & v dd ?.5 7.0 v high of?e battery supply v bath ?3 +0.5 v low of?e battery supply v batl v bath +0.5 v logic input voltage ?.5 v dd +0.5 v logic input clamp diode current, per pin 20 ma logic output voltage ?.5 v dd +0.5 v logic output current, per pin (excluding relay driver) 35 ma operating temperature range ?0 125 c storage temperature range t stg ?0 125 c relative humidity range 5 95 % ground potential difference (dgnd to agnd) 3 v
8 lucent technologies inc. advance data sheet march 1997 relay, and protector (srp) for short loop and ta-909 applications L7597 resistive subscriber line interface circuit (slic), ring electrical characteristics in general, minimum and maximum values are testing requirements. however, some parameters may not be tested in production because they are guaranteed by design and device characterization. typical values re?ct the design center or nominal value of the parameter; they are for information only and are not a requirement. minimum and maximum values apply across the entire temperature range (?0 c to +85 c) and entire battery range (?5 v to ?0 v). unless otherwise speci?d, typical is de?ed as 25 c, v cca = +5.0 v, v dd = +5.0 v, v bath = ?8 v, v batl = ?5.5 v. positive currents ?w into the device. table 2. operating conditions and powering 1. not to exceed 26 grams of water per kilogram of dry air. 2. this parameter is not tested in production. it is guaranteed by design and device characterization. 3. v bath and v batl power supply rejection depends on the battery noise cancellation circuit. the performance stated here applies to v batl only during the talk state and v bath only during the on-hook transmission state and assumes proper battery noise cancellation; i.e., a 0.1 m f capacitor from v bf to cbn (see figure 14). the 1 khz? khz power supply rejection can be improved by at least 6 db with an additional series rc (50 k w + 47 pf) network connected from rgbn to agnd (see figure 14). parameter min typ max unit temperature range ?0 85 c humidity range 5 95 1 %rh supply voltages: v cca v dd v bath v batl v cca ?v dd 4.6 4.6 ?5 ?0 5.0 5.0 ?8 ?5 5.5 5.5 ?0 v bath 0.5 v v v v v supply currents (scan state; no loop current): iv cca + iv dd (+5 v) iv bath (?8 v) iv batl (?5.5 v) 3.0 ?00 ?00 ma m a m a supply currents (talk state; no loop current): iv cca + iv dd (+5 v) iv bath (?8 v) iv batl (?5.5 v) 4.5 ?.6 ?00 ma ma m a supply currents (on-hook transmission; no loop current): iv cca + iv dd (+5 v) iv bath (?8 v) iv batl (?5.5 v) 15.0 ?8.0 ?00 ma ma m a total power dissipation (no loop current): (v cca & v dd = +5 v; v bath = ?8 v; v batl = ?5.5 v) talk state scan state on-hook transmission state 125 40 700 mw mw mw power supply rejection (tip/ring) 2 : v cca (500 hz? khz; 50 mvrms ripple) v dd (500 hz? khz; 50 mvrms ripple) v batl and v bath (500 hz? khz; 50 mvrms ripple) 3 v batl and v bath (1 khz? khz; 50 mvrms ripple) 3 40 50 40 35 50 ? 40 db db db db thermal 2 : thermal resistance (still air) operating tjc thermal shutdown temperature 145 60 135 c/w c c
lucent technologies inc. 9 advance data sheet march 1997 relay, and protector (srp) for short loop and ta-909 applications L7597 resistive subscriber line interface circuit (slic), ring electrical characteristics (continued) ring trip detector table 3. ring trip detector 1. the ringing source consists of the ac and dc voltages added together (battery backed ringing); the ringing return is battery ground. 2. pretrip: ringing must not be tripped by a 10 k w resistor in parallel with a 6 m f capacitor applied across tip and ring. battery feed table 4. battery feed 1. assumes 2 x 200 w external dc feed resistors. 2. when the current-limit circuit is active and the battery switch is off, the longitudinal current must be less than the dc loop current to ensure proper ac transmission. 3. assumes clim = 0.1 m f; clim determines the ac output impedance of the current-limit circuit when it is active. 4. detector values are independent of of?e battery and are valid over the entire range of v bath and v batl . however, nstat must indicate an on hook (nstat = 1) if either v bath or v batl is disconnected (open circuit) from its dc source and an off hook at the power supply pins as follows (the pins of supplies that have more than one pin are shorted together): when cs is high (thermal shutdown = 0 v). v bath and v batl are de?ed as disconnected depending on the voltage at the power supply pins as follows (the pins of supplies that have more than one pin are shorted together): ?if v bath ?0 v (i.e., more negative than ?0 v) and v batl ?0 v, then nstat must operate normally. ?if v bath 3 ?0 v (i.e., more positive than ?0 v) or v batl 3 ?0 v, then nstat must be on hook (nstat = 1). 5. ieee is a registered trademark of the institute of electrical and electronics engineers, inc. 6. assumes the external dc feed resistors are matched to 0.4% and proper battery noise cancellation; i.e., a 0.1 m f capacitor from v bf to cbn. 7. assumes proper battery noise cancellation; i.e., a 0.1 m f capacitor from v bf to cbn. parameter min typ max unit ringing source 1 : frequency (f) dc voltage ac voltage 17 ?6 60 20 28 ?7 105 hz v vrms ring trip 2 (nstat = 0): loop resistance trip time (f = 20 hz) nstat valid 1330 200 80 w ms ms parameter min typ max unit loop resistance range 1 (3.17 dbm overload into 600 w): i loop = 20 ma at v batl = ?4.2 v i loop = 25 ma at v batl = ?5.5 v 700 525 w w longitudinal current capability per wire 2 8.5 marms dc loop current limit (r loop = 200 w) 23.75 25 26.25 ma current-limiter ac output impedance 3 : 200 hz to 4 khz 50 w current-limiter transient current (in response to a step voltage change on v bf ) 8 150 ma switchhook detector loop resistance 4 : off hook (nstat = 0) on hook (nstat = 1) 5000 4000 3000 w w w longitudinal to metallic balance ieee 5 std. 455 6 : 200 hz to 1 khz 1 khz to 3 khz 50 45 db db metallic to longitudinal (harm) balance 7 : 200 hz to 4 khz 30 db
10 lucent technologies inc. advance data sheet march 1997 relay, and protector (srp) for short loop and ta-909 applications L7597 resistive subscriber line interface circuit (slic), ring electrical characteristics (continued) fault protection pins pt, pr, and v bf pins pt, pr, and v bf are protected by scrs which clamp surge currents (both positive and negative) to fgnd. if the scr on pr or v bf triggers due to a negative surge, the L7597 automatically switches to the disconnect state while the scr is conducting current above its hold current. after the scr releases, the L7597 automatically switches back to the operating state prior to the scr trigger. table 5. electrical characteristics of pins pt, pr, and v bf 1. this parameter is not tested in production. it is guaranteed by design and device characterization. 2. applied voltage is 50 vpp square wave at 100 hz to measure dv/dt sensitivity. parameter min typ max unit pt and pr: surge current 1 : lightning?0 m s x 1000 m s lightning? m s x 10 m s power cross?0 hz, 1 s power cross?0 hz, 15 min. scr trigger voltage pin pt: positive negative dc transient response scr trigger voltage pin pr: positive negative scr hold current (positive and negative) v cca ?2 ?5 ?5 150 ?20 10 1 2.5 200 50 v cca + 4 ?5 ?5 280 ?20 a a marms marms v v v v v ma v bf : surge current 1 : lightning?0 m s x 1000 m s lightning? m s x 10 m s power cross?0 hz, 1 s power cross?0 hz, 15 min. scr trigger voltage: positive negative scr hold current (positive and negative) 150 ?20 10 5.5 13 800 150 280 ?20 a a marms marms v v ma trigger current (if from a power supply?t, pr, and v bf ) 250 m a dv/dt sensitivity 1, 2 (pt, pr, and v bf ) 500 v/ m s
lucent technologies inc. 11 advance data sheet march 1997 relay, and protector (srp) for short loop and ta-909 applications L7597 resistive subscriber line interface circuit (slic), ring electrical characteristics (continued) fault protection (continued) loss of power supplies the L7597 must protect itself from lightning and power cross voltages on tip and ring if any (or any combination) of the power supplies (v cca , v dd , v bath , and v batl ) are disconnected (open circuit) from their dc source. addition- ally, if any power supply is disconnected, no overvoltage on tip or ring can cause a supply voltage to exceed its maximum rating. under these conditions, v cca and v dd are considered as one supply (v cca shorted to v dd ), the pins of supplies which have more than one pin are shorted together, and bypass capacitors are connected. to sat- isfy these requirements (and also to disconnect ringing from the loop when ring trip cannot be detected), the L7597 is placed into the disconnect state depending on the voltage at the power supply pins as shown below. table 6. loss of power supplies analog signal pins table 7. analog signal pins 1. a battery or ground short on pt, pr, or xmt shall not cause a device failure. 2. this parameter is not tested in production. it is guaranteed by design and device characterization. parameter min typ max unit v cca & v dd : normal operating state (as de?ed by control logic) disconnect state 1 4.5 v v v bath : normal operating state (as de?ed by control logic) disconnect state disconnect state ?0 ?5 ?5 ?0 v v v parameter min typ max unit pt and pr: surge current (see the protection section.) output drive (pt): positive (sink) drive current negative voltage swing (i out = +15 ma) negative (source) drive current positive voltage swing (i out = ?.1 ma) positive voltage swing (i out = ?0 ma) +15 ?5 ?0 v cca ?2 v cca ?3.5 v bath v cca v cca ma v ma v v output drive (pr): positive (sink) drive current negative voltage swing (i out = +0.1 ma) negative voltage swing (i out = +10 ma) negative (source) drive current positive voltage swing (i out = ?0 ma) output short-circuit transient current 1 output impedance (60 hz?.4 khz) 2 output load resistance (dc or ac) output load capacitance 2 +10 v bath + 2 v bath + 4.5 ?0 ? 250 100 v bath v bath v cca 125 1 ma v v ma v ma k w w nf
12 lucent technologies inc. advance data sheet march 1997 relay, and protector (srp) for short loop and ta-909 applications L7597 resistive subscriber line interface circuit (slic), ring electrical characteristics (continued) analog signal pins (continued) table 7. analog signal pins (continued) 1. a battery or ground short on pt, pr, or xmt will not cause a device failure. 2. this parameter is not tested in production. it is guaranteed by design and device characterization. parameter min typ max unit xmt: output drive current output voltage swing (1 ma load): maximum minimum output short-circuit dc current 1 output impedance (60 hz?.4 khz) 2 output load dc resistance 2 output load ac impedance 2 output load capacitance 2 1 v bath v bath + 5 ? 50 2 v cca +2.5 20 10 50 ma v v ma w k w k w pf rcvn: input voltage range 2 input bias current input impedance 2 ?.75 20 3.5 1 v m a m w ircv: input offset voltage (to rcvn) input impedance 50 5 mv w cbn: surge current (lightning?0 m s x 1000 m s) input voltage range 2 input bias current input impedance 2 ?.75 50 100 3.5 250 ma v na m w rgbn: input offset voltage (to cbn) input impedance 2 10 5 mv w ts and rs: surge current (from external source) input voltage range input bias current differential input impedance 2 common-mode input impedance 2 external capacitance (67 kw source impedance) 2 v bath + 3 50 50 25 agnd 1 10 madc v m a k w m w pf
lucent technologies inc. 13 advance data sheet march 1997 relay, and protector (srp) for short loop and ta-909 applications L7597 resistive subscriber line interface circuit (slic), ring electrical characteristics (continued) transmission characteristics transmit direction is tip/ring to xmt. receive direction is ircv/rcvn to tip/ring. table 8. ac transmission characteristics 1. requires external components connected as shown in figure 5. transmission characteristics are speci?d assuming a 600 w resistive termi- nation and 1% external resistors. 2. this parameter is not tested in production. it is guaranteed by design and device characterization. parameter 1 min typ max unit ac termination impedance 600 w return loss 2 : 200 hz?00 hz 500 hz?500 hz 2500 hz?400 hz 21 26 21 db db db tip/ring signal level (600 w reference) 3.14 dbm total harmonic distortion (200 hz? khz) 2 0.3 % transmit gain (f = 1 khz): (tip/ring) to xmt ?.486 ?.500 ?.514 receive gain (f = 1 khz): ircv to differential current flowing from ipt to ipr rcvn to ircv 195 0.995 200 1 205 1.005 gain vs. frequency (transmit and receive; 1 khz reference) 2 : 200 hz?00 hz 300 hz?.4 khz 3.4 khz?0 khz 20 khz?66 khz ?.00 ?.30 ?.0 0 0 0 0.05 0.05 2.0 2.0 db db db db gain vs. level (transmit and receive; 0 dbv reference) 2 : ?0 db to +3 db ?.05 0 0.05 db transhybrid loss 2 : 200 hz?00 hz 500 hz?500 hz 2500 hz?400 hz 21 26 21 db db db idle-channel noise (tip/ring): psophometric 2 c-message 3 khz flat 2 ?7 12 20 dbmp dbrnc dbrn idle-channel noise (xmt): psophometric 2 c-message 3 khz flat 2 ?7 12 20 dbmp0 dbrnc0 dbrn0
14 lucent technologies inc. advance data sheet march 1997 relay, and protector (srp) for short loop and ta-909 applications L7597 resistive subscriber line interface circuit (slic), ring electrical characteristics (continued) data interface and logic table 9. logic inputs (ce, cs, and b0?3) and output nstat 1. unless otherwise speci?d, all logic voltages are referenced to dgnd. 2. this parameter is not tested in production. it is guaranteed by design and device characterization. timing requirements (b0?3 and cs) a low-to-high transition on pin cs latches the data on pins b0?3 into the device. when cs is either high or low, the device is unaffected by data on pins b0?3. the status of the thermal shutdown circuit is output on b3 when cs is high (thermal shutdown = 0 v). a low on channel enable lead ce asynchronously resets the data latch to 1111 (scan state with the relay driver off) and disables cs so that cs cannot latch any data into the device. a high on ce enables cs. table 10. timing requirements (b0?3 and cs) 1. unless otherwise speci?d, all times are measured from the 50% point of logic transitions. 2. these parameters are not tested in production. they are guaranteed by design and device characterization. relay driver (rdo) the relay driver output rdo is low (relay operated) when a low input on b3 is latched into the device. table 11. relay driver (rdo) 1. unless otherwise speci?d, all logic voltages are referenced to dgnd. 2. this parameter is not tested in production. it is guaranteed by design and device characterization. parameter 1 symbol min max unit high-level input voltage v ih 2v dd v low-level input voltage v il 0 0.8 v input bias current (high and low) i in 10 m a high-level output voltage (i out = ?00 m a) v oh v dd ?1.5 v dd v low-level output voltage (i out = 180 m a) v ol 0 0.4 v output short-circuit current (v out = v dd )i oss 135ma output load capacitance 2 c ol 050pf parameter 1, 2 symbol min max unit cs rise and fall time (10% to 90%) tr, tf 0 50 ns maximum input capacitance cin 5 pf minimum setup time from b0?3 valid to cs tsds 150 ns minimum hold time from cs to b0?3 not valid thds 50 ns minimum pulse width of cs twcs 225 ns parameter 1 symbol min max unit off-state output current (v rdo = v dd )i off 10 m a on-state output voltage (i rdo = 70 ma) v on 0 1.0 v on-state output voltage (i rdo = 20 ma) v on 0 0.40 v clamp diode reverse current (v rdo = 0) i r 10 m a clamp diode on voltage (i rdo = 150 ma) v oc v dd v dd + 2.0 v turn-on time 2 t on ?0 m s turn-off time 2 t off ?0 m s
lucent technologies inc. 15 advance data sheet march 1997 relay, and protector (srp) for short loop and ta-909 applications L7597 resistive subscriber line interface circuit (slic), ring electrical characteristics (continued) switch characteristics table 12. battery switch (sw1) and ring break switch (sw2) 1. sw2 must be off if the voltage on pin pr is more positive than v cca . 2. at 25 c. maximum voltage rating has a temperature coef?ient of +0.167 v/ c. 3. this parameter is not tested in production. it is guaranteed by design and device characterization. 4. applied voltage is 100 vpp square wave at 100 hz to measure dv/dt sensitivity. table 13. ringing access switch (sw3) 1. sw2 must be off if the voltage on pin pr is more positive than v cca . 2. at 25 c. maximum voltage rating has a temperature coef?ient of +0.167 v/ c. 3. this parameter is not tested in production. it is guaranteed by design and device characterization. 4. applied voltage is 100 vpp square wave at 100 hz to measure dv/dt sensitivity. parameter min typ max unit off-state 1 : maximum differential voltage dc leakage current (v sw = 320 v) feedthrough capacitance 3 320 2 50 50 v m a pf on-state (see figures 3 and 4.): resistance (r on ) maximum differential voltage (vmax) current limit (i limit ) 20 50 35 100 320 2 60 w v ma dv/dt sensitivity 3, 4 200 v/ m s parameter min typ max unit off-state: maximum differential voltage dc leakage current (v sw = 500 v) dc leakage current (v sw = 250 v) feedthrough capacitance 1 500 2 20 1 10 v m a m a pf on-state (see figures 3 and 4.): crossover offset voltage (v os ; i sw = 1 ma) resistance (r on ) surge current (10 m s x 1000 m s pulse) 3 release current 1 0.1 3 10 2.0 3 v w a ma dv/dt sensitivity 3, 4 500 v/ m s
16 16 lucent technologies inc. advance data sheet march 1997 relay, and protector (srp) for short loop and ta-909 applications L7597 resistive subscriber line interface circuit (slic), ring electrical characteristics (continued) switch characteristics (continued) switch on-state v-i characteristics 12-3332 (c) figure 3. switch on-state v-i characteristics sw1 and sw2 12-3292 (c) figure 4. switch on-state v-i characteristics sw3 operating states the L7597 has eight operating states. these states are selected using three logic input bits, b0?2, according to the truth table shown in table 14. logic input b3 operates a relay driver independent of the state of bits b0?2. data on the parallel data bus, b0?3, is loaded into a 4-bit latch on the L7597 on the low-to- high transition of the channel select lead cs. changes in the data at inputs b0?3 do not affect the L7597 while cs is either low or high. a low on channel enable lead ce asynchronously resets the 4-bit latch to 1111 (scan state with the relay driver off) and disables the channel select lead cs (i.e., cs is prevented from load- ing any data into the 4-bit latch). a high on ce enables cs. state transitions and delays between transitions are left to the discretion of the user since, except for fault conditions described later, the state of the L7597 depends only on the external control provided through the logic interface. table 14. input state coding scan state n normal on-hook supervision state. n the receive transmission path is powered down; the transmit path is powered up. n the battery feed is connected to the high battery supply (v bath ). n the current limiter is powered down and disabled. n sw1 is closed; sw2 and sw3 are open. n nstat re?cts the status of the switchhook detector. +i limit i sw +1.5 v 2/3 r on r on ?.5 v 2/3 r on ? limit ? max current limiting +v max v sw current limiting ? os +v os v sw r on i sw r on ce b3 b2 b1 b0 state 0xxxx scan state with relay driver off 1 x 1 1 1 scan 1 x 1 1 0 disconnect 1 x 1 0 1 talk/high battery 1x100talk 1 x 0 1 1 scan current limit 1 x 0 1 0 ringing 1 x 0 0 1 on-hook transmission 1 x 0 0 0 intermediate talk state 1 0 x x x relay driver output (rdo) is low (relay active) 1 1 x x x relay driver output (rdo) is high (relay not active)
lucent technologies inc. 17 advance data sheet march 1997 relay, and protector (srp) for short loop and ta-909 applications L7597 resistive subscriber line interface circuit (slic), ring operating states (continued) disconnect state n forward disconnect state. n the receive transmission path is powered down; the transmit path is powered up. n the current limiter is powered down and disabled. n sw1, sw2, and sw3 are open. n pins pt, pr, and v bf are high impedance (>100 k w ). n nstat is forced high (on hook). talk/high battery state n alternate talk state. n the battery feed is connected to the high battery supply (v bath ). n the receive and transmit transmission paths are both powered up. n the current limiter is powered up and active. n sw1 and sw2 are closed; sw3 is open. n nstat re?cts the status of the switchhook detector. talk state n normal talk state. n the battery feed is connected to the low battery sup- ply (v batl ). n the receive and transmit transmission paths are both powered up. n the current limiter is powered up and active. n sw2 is closed; sw1 and sw3 are open. n nstat re?cts the status of the switchhook detector. scan current-limit state n alternate on-hook supervision state. n same as scan state but with the current limiter pow- ered up and active. n the receive transmission path is powered down; the transmit path is powered up. n sw1 is closed; sw2 and sw3 are open. n nstat re?cts the status of the switchhook detector. ringing state n normal ringing state. n the receive and transmit transmission paths are both powered down. n sw3 is closed; sw1 and sw2 are open. n the current limiter is powered down and disabled. n nstat re?cts the status of the ring trip detector. on-hook transmission state n normal on-hook transmission state. n the battery feed connected to the high battery sup- ply (v bath ). n the receive and transmit transmission paths are both powered up. n the current limiter is powered down and disabled. n a 10 ma dc bias current ?ws out of the ring current driver into pr and a 5 ma dc bias current ?ws into the tip current driver from pt (the switchhook detec- tor is adjusted to compensate for this dc bias cur- rent). n sw1 and sw2 are closed; sw3 is open. n nstat re?cts the status of the switchhook detector. intermediate talk state n talk state with an increased and current-limited out- put impedance. n same as talk state. n the current limiter is powered up and active. n a 10 ma dc bias current ?ws out of the ring current driver into pr and a 5 ma dc bias current ?ws into the tip current driver from pt (the switchhook detec- tor and current limiter are adjusted to compensate for this dc bias current). n sw2 is closed; sw1 and sw3 are open. n nstat re?cts the status of the switchhook detector.
18 18 lucent technologies inc. advance data sheet march 1997 relay, and protector (srp) for short loop and ta-909 applications L7597 resistive subscriber line interface circuit (slic), ring applications general the L7597 supplies a precise differential current to the tip/ring pair (via pt and pr) as a function of analog signals on ircv and rcvn. however, the current driv- ers connected to pt and pr are not designed to supply dc feed current to the loop. the dc loop current is fed by two external 200 w resistors. when a loop is idle (on hook), the battery switch (sw1) is turned on to connect the ring lead to v bath which is typically ?8 v; thus providing suf?ient tip/ring open circuit voltage to operate various types of customer premises equipment (cpe). transmission may or may not be enabled in the idle dc feed condition. if transmission is enabled (on- hook transmission), the current drivers are biased to a preset dc current (10 ma into pr and 5 ma out of pt) so that they can both source and sink suf?ient signal current when no dc loop current is ?wing (even in the presence of longitudinal currents on tip and ring). when the loop is off hook, the battery switch (sw1) is turned off and the current limiter becomes active. this connects the ring lead to v batl (typically ?5.5 v) through an accurate current-limiter circuit which saves off-hook power dissipation. transmission is enabled in this dc feed condition, but the dc bias current in the drivers is turned off (hence, no increased power dissi- pation) because dc loop current is ?wing. the external 200 w dc feed resistors will, for the most part, determine the longitudinal balance of the slic; thus, they must be matched appropriately to meet the longitudinal balance requirements (0.35% for 50 db balance). the impedance of the battery switch and cur- rent limiter in series with the ring-side dc feed resistor is reduced by the battery noise cancellation circuit so that it has minimal effect on the longitudinal balance. the dc feed resistors also have a signi?ant impact on the termination impedance of the slic. some feed- back, using external components, allows the user to adjust the termination impedance somewhat from the 400 w dc feed resistance so that the primary applica- tion of the L7597 is for a 600 w ring resistive termina- tion. because the L7597 does not supply dc feed current to the loop, outputs pt and pr can be coupled to the tip and ring through a suf?iently high resis- tance to allow for simple lightning protection of the driv- ers. however, the resistance must be low enough to achieve the coupling of suf?ient ac signal to the tip and ring from the available power supply. since the tip and ring drivers are current sources, the value of this resistance does not affect the performance of the slic and is somewhat arbitrary. the value chosen is typi- cally 1000 w . the L7597 also senses the differential tip/ring voltage via sense inputs ts and rs. the differential dc voltage is used internally for switchhook detection. the detec- tor threshold is preset internally. the differential tip/ ring ac signal appears on analog output xmt. also included on the L7597 are three scr protectors, a relay driver, one logic output (indicates switchhook and ring trip status), a 4-bit parallel logic interface, a ringing access switch, a ring trip detector, and a circuit which eliminates the battery noise that is coupled to the tip and ring through the dc feed resistors. the following diagram and table shows the basic exter- nal components required with the L7597 slic. speci? component values are given in cases where the value is ?ed. in cases where the value may change (i.e., components that determine the ac interface), the value is not listed but equations to determine these values are given later in this document.
lucent technologies inc. 19 advance data sheet march 1997 relay, and protector (srp) for short loop and ta-909 applications L7597 resistive subscriber line interface circuit (slic), ring applications (continued) general (continued) 12-3334.b (c) * optional to improve v batl psrr by 6 db. figure 5. external components required rs 31 pr 22 r 5 200 k w r 7 1 k w +5 a 5, 26 2, 27 agnd v cca dgnd k1 cv dd 0.1 ? 14 13 v dd dg 15 +5 d ce b0 b1 b2 b3 cs nstat 12 11 10 9 8 7 6 parallel data interface to control logic rcvn ircv rgbn vfx r gx gsx(n) vfxin(n) vfro(n) 32 1 4 r rv1 r 9 20 k w 1/4 t7504 50 k w * 47 pf* fgnd 21 (fault ground) v bath 21 25 v batl c batl 0.1 ? c bath 0.1 ? v bath (?8 v) v batl (?5.5 v) (office battery) v rng 18 v rng (ringing supply) r cbn1 5.11 k w cbn 3 c cbn1 0.1 ? r cbn2 301 k w c cbn2 0.01 ? c lim 0.1 ? clim 24 r rt 1 m w rts 16 c rt 0.1 ? rsw 17 r 10 600 w vbf 20 r 1 200 w r 3 100 k w ts 30 pt 23 200 k w r 8 1 k w xmt 29 100 k w vfx c b1 0.1 ? L7597aau slic rdo r hb1 r4 r 6 c gbn r gbn r rv2 c b2 r gx1 c s cv cc 0.1 ? r 2 200 w resistor module resistor module xmt r t1 r t2 ring tip f1 f2
20 lucent technologies inc. advance data sheet march 1997 relay, and protector (srp) for short loop and ta-909 applications L7597 resistive subscriber line interface circuit (slic), ring applications (continued) general (continued) table 15. external components required 1. power is continuous rms power. 2. r 1 /r 2 = 1, with a tolerance of 0.35% for 50 db longitudinal balance, 0.2% for 58 db longitudinal balance. fuses on f1 and f2 provide fail-safe operation if excessive overvoltage conditions exist on tip and ring. they will not operate if the total power dissipation of the entire resistor network is 5.0 w at 85 c. 3. (r 3 + r 6 )/(r 4 + r 5 ) = 1 with a tolerance of 0. 35% for 50 db longitudinal balance, 0.2% for 58 db longitudinal balance. 4. r 9 /r 1 = 100 with a tolerance of 0.5%. 5. optional components to improve psrr by 6 db. comp. function implementation value attribute 1 f1 fuse protector resistor module f2 fuse protector resistor module r 1 dc feed protection resistor module 200 w 1.0%, 2 w 2 r 2 dc feed protection resistor module 200 w 1.0%, 2 w 2 r 3 transmit gain resistor module 100 k w 1.0%, 25 mw 3 r 4 transmit gain resistor module 100 k w 1.0%, 25 mw 3 r 5 transmit gain resistor module 200 k w 1.0%, 25 mw 3 r 6 transmit gain resistor module 200 k w 1.0%, 25 mw 3 r 7 protection resistor module 1 k w 2.0%, 0.1 w r 8 protection resistor module 1 k w 2.0%, 0.1 w r 9 battery noise cancellation resistor module 20 k w 10 mw 4 r 10 ringing resistor module 600 w 1.0%, 1.6 w (14 w for 250 ms) c vcc v cc filter external 0.1 m f 20%, 10 v c vdd v dd filter external 0.1 m f 20%, 10 v c batl v batl filter external 0.1 m f 20%, 100 v c bath v bath filter external 0.1 m f 20%, 100 v c lim current limit external 0.1 m f 20%, 100 v r cbn1 battery noise cancellation external 5.11 k w 1%, 1/16 w r cbn2 battery noise cancellation external 301 k w 1%, 1/16 w c cbn3 battery noise cancellation external 0.1 m f 20%, 100 v c cbn4 battery noise cancellation external 0.01 m f 20%, 100 v c gbn 5 battery noise cancellation external 47 pf 20%, 100 v r gbn 5 battery noise cancellation external 50 k w 20%, 100 v c rt ring trip external 0.1 m f 1%, 1/16 w r rt ring trip external 1 m w 20%, 100 v c b1 dc blocking external 0.1 m f 20%, 10 v c b2 dc blocking external 0.1 m f 20%, 10 v r t1 ac interface external see ac design equations 1%, 1/32 w r t2 ac interface external see ac design equations 1%, 1/32 w r gx ac interface external see ac design equations 1%, 1/32 w r gx1 ac interface external see ac design equations 1%, 1/32 w r rv1 ac interface external see ac design equations 1%, 1/32 w r rv2 ac interface external see ac design equations 1%, 1/32 w c s ac interface external see ac design equations 1%, 1/32 w r hb1 ac interface external see ac design equations 1%, 1/32 w
lucent technologies inc. 21 advance data sheet march 1997 relay, and protector (srp) for short loop and ta-909 applications L7597 resistive subscriber line interface circuit (slic), ring applications (continued) resistor module the L7597 requires certain external resistors at the tip and ring interface. because of matching and protection requirements, one of the most economical options recommended to implement these resistors is in a thick-?m resistor module. a schematic and a brief description of the function of each of these resistors is given in figure 6. note that microelectronic modules corporation* mmc a31a8574aa and mmc a11a8574aa thick-?m resistor modules are application-speci? resistor modules designed for use with the L7597 slic. the values, tolerance, matching, and power rating of the mmc a31a8574aa and mmc a11a8574aa modules are given in table 16. resistors r 1 and r 2 are the dc feed resistors. r 1 is connected from battery to ring and r 2 is connected from tip to ground. the dc loop current is fed to the subscriber loop via these resistors. the resistors set the dc feed resis- tance, which is r 1 + r 2 (400 = 200 + 200). resistors r 1 and r 2 also provide a common-mode impedance of (200 || 200) 100 w . these resistors will primarily determine the longitudinal balance of the line circuit; thus they must be matched appropriately to meet longitudinal balance requirements (0.35% for 50 db and 0.2% for 58 db). also, they have a signi?ant impact on the termina- tion impedance of the slic. feedback using external components (external components when a ?st- or second- generation codec is used) allows the user to set the termination impedance at 600 w , or most itu-t recommended termination impedances. under normal operating conditions, the current through resistors r 1 and r 2 is limited by the current-limit circuitry to 25 ma. thus, the 2 w rating of resistors r 1 and r 2 in mmc a31a8574aa and mmc a11a8574aa is adequate for normal operation. the power rating of these resistors is discussed more in the protection section of this data sheet. * for additional information, contact microelectronic modules corporation ( mmc ), 2601 s. moorland rd., new berlin, wi 53151 u.s.a.: tel. 414-785-6506, fax 414-785-6516, e-mail sales@mmccorp.com.
22 lucent technologies inc. advance data sheet march 1997 relay, and protector (srp) for short loop and ta-909 applications L7597 resistive subscriber line interface circuit (slic), ring applications (continued) resistor module (continued) 5-5279 (f) notes: 1. pin numbers and resistor labels are per mmc a31a8574aa and mmc a11a8574aa descriptions. 2. node labels are per L7597 package. 3. for 600 v power cross, resistor networks should ?pen in less than 40 ms. figure 6. resistor network table 16. mmc a31a8574aa and mmc a11a8574aa module 1. continuous (rms) power. 2. for 50 db longitudinal balance; 0.2% for 55 db balance. note: fuses f1 and f2 provide fail-safe operation if excessive overvoltage conditions exist on tip and ring. they will not operate if the total power dissipation of the entire resistor network is 5.0 w @ 85 c. resistor value tolerance power 1 surge rating r 1 200 w 1.0% 2.0 w lightning: power cross r 2 200 w 1.0% 2.0 w lightning: power cross r 3 100 k w 1.0% 25 mw none r 4 100 k w 1.0% 25 mw none r 5 200 k w 1.0% 25 mw lightning: power cross r 6 200 k w 1.0% 25 mw lightning: power cross r 7 1 k w 2.0% 0.1 w lightning: power cross r 8 1 k w 2.0% 0.1 w lightning: power cross r 9 20 k w 10 mw none r 10 600 w 1.0% 1.6 w 14 w for 250 ms r 9 /r 1 100 0.5% r 1 /r 2 1 0.35% 2 (r 3 + r 6 )/(r 4 + r 5 ) 1 0.35% 2 1 ring pr rgbn gnd rs v bf gnd rsw ts xmt pt tip f2 r 7 2345 r 9 r 3 7 6 r 5 r 10 r 6 r 4 12 11 10 9 81314 f1 r 8 r 2 r 1
lucent technologies inc. 23 advance data sheet march 1997 relay, and protector (srp) for short loop and ta-909 applications L7597 resistive subscriber line interface circuit (slic), ring applications (continued) resistor module (continued) resistors r 3 ? 6 set the gain of the slic in the transmit (2-wire to 4-wire) direction. this is shown in figure 7. 5-5277 (f) figure 7. L7597 slic matching requirements the matching of resistors r 3 ? 6 will determine the gain accuracy of the slic; therefore, these resistors must be matched accordingly. their matching require- ments are given in table 16. because of the high resistance values, the normal operating power of resistors r 3 ? 6 will be relatively low. given design margin and thick-?m technology capabilities, a power rating of 250 mw for these resis- tors is not unreasonable. resistors r 7 and r 8 are used to couple the pt and pr current drive ampli?rs to tip and ring. since pt and pr drive ampli?rs are current sources, the value of the series resistance does not affect the loop length or other performance of the slic, and may be arbitrarily high for protection purposes. a value of 1 k w is ade- quate for protection purposes. under normal operating conditions, these resistors will see the battery voltage less the tip/ring voltage. assuming a tip/ring voltage of 6 v (representative of a short into a handset), the normal continuous operating power of r 7 and r 8 is given by: (48 v ?6 v) e2/2.0 k w = 0.882 w per r 7 and r 8 resistor pair 882 mw/2 = 441 mw per resistor (r 7 and r 8 ) hence, the operating power rating of 500 mw for r 7 and r 8 . this is the normal rating for r 7 and r 8 under normal operating conditions. the ability of these resis- tors to withstand fault conditions depends on the power rating. resistor r 9 is also included on the thick-?m resistor module. this resistor is used to set the gain of the battery noise cancellation circuit. see the battery noise cancellation section of this data sheet for design equations to set the value of r 9 . power ringing is applied to the line circuit through resis- tor r 10 . one side of r 10 is connected to L7597 node rsw. rsw is the output of the integrated solid-state ringing access switch, sw3. the other side of r 10 is connected to the 200 w ring feed resistor, r 1 . resistor r 10 also serves as a current-limiting resistor. fault cur- rent through the solid-state ringing access switch, sw3, is limited by r 10 . sw3 is rated for 2 a maximum for a 10 m s x 1000 m s (lightning) pulse. continuous cur- rent through this switch should be less than 150 ma. r 10 in mmc resistor modules a31a8574aa and mmc a11a8574aa is chosen to be 600 w . protection because of the resistive feed architecture, a simple inexpensive protection scheme that does not require an external protection device may be used. the mmc a31a8574 resistor module has speci?ations which are quali?d to itu-t k20, ul * 1459, ul 497a, fcc part 68.302 (d) & (e), and rea form 397g speci?a- tion. the mmc a11a8574aa resistor module, in addi- tion to meeting all the speci?ations of the mmc a31a8574, also meets bellcore 1089 requirements. lightning and power-cross protection are provided by the two external dc feed (and current-limiting) resis- tors, r 1 and r 2 , in the external resistor module. under fault conditions, these resistors serve as fault current- limiting resistors. these resistors are designed to sur- vive lightning surges. they are also designed to contin- uously dissipate 4 w each and to survive 1 arms @ 60 hz power crosses of 1 second in duration. sus- tained power dissipation above these levels will cause degradation and eventual failure; however, the resistors are designed to fail gracefully under these conditions. pins pt and pr are isolated from the loop by external 1000 w resistors, and pin v bf is isolated from the loop by the ring-side, 200 w dc feed resistor. these pins must have adequate fault protection which operates outside of their normal operating voltages. all three pins are protected by scrs which clamp the surge cur- rents (both positive and negative) to fgnd. the sense inputs, ts and rs, are protected with diodes to battery tip ring r 5 200 k w r 6 200 k w r 4 100 k w + xmt r 3 100 k w * ul is a registered trademark of underwriters laboratories, inc.
24 24 lucent technologies inc. advance data sheet march 1997 relay, and protector (srp) for short loop and ta-909 applications L7597 resistive subscriber line interface circuit (slic), ring applications (continued) protection (continued) (v bath ) and v cca and the series high-value external resistors which connect them to tip and ring. because the battery noise cancellation input cbn is connected to pin v bf through a 0.1 m f capacitor, it must also be protected. internally, it is protected with an 8 v zener diode connected to v cca . an external resistor of at least 3 k w (5 k w is recommended) is required to limit the surge current. no external protector device is required. tip/ring drivers the L7597 has two tip/ring drivers whose outputs are pt and pr. each driver operates as a current source capable of sinking or sourcing adequate ac signal cur- rent plus the dc bias current that is required during on- hook transmission. receive interface the receive interface circuitry couples the differential signal on receive inputs ircv and rcvn to the tip/ ring drivers. input ircv is a low-impedance (<5 w ) current input while rcvn is a high-impedance voltage input. internal feedback forces the voltage at ircv to be equal to rcvn so that a voltage applied to rcvn causes a current ?w out of ircv which equals that voltage divided by the impedance connected from ircv to agnd (assuming the input voltage is refer- enced to agnd). the receive interface and tip/ring drivers provide a current gain of 200; i.e., a differential output current ?ws from pt to pr which is 200 times the current ?wing into ircv. the receive interface also provides a level shift since the inputs, ircv and rcvn, are refer- enced to analog ground, while the outputs, pt and pr, swing between v cca and v bath . the receive interface ensures that the input current is not converted to a common-mode current at pt and pr. transmit interface the transmit interface circuitry interfaces the differen- tial voltage on tip and ring to transmit output xmt. the tip/ring differential voltage (both ac and dc) appears on output xmt with a gain of 0.5. the transmit interface uses an operational ampli?r with four external resis- tors to perform a differential to single-ended conver- sion. the operational ampli?r inputs are ts and rs. output xmt is referenced to ground (agnd). the lon- gitudinal balance and gain accuracy at xmt depend on the matching of the external resistors (0.35%). because a large dc potential exists at xmt, a capacitor must be used to couple the ac signal to the low-voltage codec circuitry. battery noise cancellation the battery noise cancellation circuit senses the ac noise on the battery via the capacitor connected from input cbn to v bf . it couples this noise, 180 out of phase, to the ring current drive ampli?r. this cancels the battery noise that is coupled to the ring through the feed resistor connected to v bf . additionally, it ensures longitudinal balance which depends only on the matching of the battery feed resis- tors by creating an ac ground at v bf with respect to sig- nals on the ring lead. for the cancellation to operate properly, both the phase and gain must be accurate. the battery noise cancella- tion gain is a transconductance which is equal to 100 divided by the resistor connected from r gbn to ground (agnd). this value must be equal to the reciprocal of the dc feed resistor (1/200). that is: 100/r9 = 1/200 r9 = 20 k w it is advantageous if resistors r 9 and r 1 are matched and tracked thermally, i.e., located on the same ?m integrated circuit (fic). psrr can be improved by adding a 47 pf capacitor in series with a 50 k w resistor from r gbn to ground. also, to implement the battery noise cancellation func- tion, connect the following circuit from cbn to v bf and analog ground. 5-5278 (f) figure 8. implementing the noise cancellation function v bf cbn 301 k w 0.1 m f 5.11 k w 0.01 m f L7597
lucent technologies inc. 25 advance data sheet march 1997 relay, and protector (srp) for short loop and ta-909 applications L7597 resistive subscriber line interface circuit (slic), ring applications (continued) on-hook transmission during the on-hook transmission and talk/on-hook transmission states, the L7597 provides 10 ma dc bias current out of the ring current driver into pr and a 5 ma dc bias current into the tip current driver from pt. the switchhook detector is adjusted to compensate for this dc bias current. the L7597 is able to support on- hook transmission because of this bias. it is suf?iently high to drive a 3.17 dbm signal into a 600 w or 900 w ac loop. in order to conserve power, this bias is removed during the scan, active, and disconnect states. parallel data interface a 6-wire parallel interface (ce, cs, b0, b1, b2, and b3) is used to pass control information from the control logic on the line card to the L7597. the L7597 has eight operating states. these states are selected using three logic input bits, b0?2, according to the truth table shown in table 14. logic input b3 operates a relay driver independent of the state of bits b0?2. data on the parallel data bus, b0?3, is loaded into a 4-bit latch on the L7597 on the low-to-high transition of the channel select lead cs. changes in the data at inputs b0?3 do not affect the L7597 while cs is either low or high. a low on channel enable lead ce asynchronously resets the 4-bit latch to 1111 (scan state with the relay driver off) and disables the channel select lead cs (i.e., cs is prevented from loading any data into the 4-bit latch). a high on ce enables cs. state transitions and delays between transitions are left to the discretion of the user since, except for fault con- ditions, the state of the L7597 depends only on the external control provided through the logic interface. supervision the L7597 offers the ring trip, loop closure, and ther- mal shutdown functions. the status of these functions are provided as device outputs. the outputs of the ring trip and off-hook supervision functions are multiplexed into a single output, ns tat. whether the loop closure or ring trip detector output supervision functions output is seen at nstat is a function of the device state. the device state table (table 14) details which supervision output (loop closure or ring trip) is seen at nstat dur- ing a given device state. detector values are independent of of?e battery and are valid over the entire range of v bath and v batl . how- ever, nstat must indicate an on-hook (nstat = 1) if either v bath or v batl is disconnected (open circuit) from its dc source and an off-hook (nstat = 0) if the L7597 is in thermal shutdown. v bath and v batl are de?ed as disconnected depending on the voltage at the power supply pins as follows (the pins of supplies which have more than one pin are shorted together): if v bath ?0 v (i.e., more negative than ?0 v) and v batl ?0 v, then nstat must operate normally. if v bath 3 ?0 v (i.e., more positive than ?0 v) or v batl 3 ?0 v, then nstat must be on-hook (nstat = 1). the status of the thermal shutdown circuit is output on b3 when cs is high (thermal shutdown = 0 v). off-hook detection the off-hook or loop closure threshold on the L7597 slic is internally ?ed and has a hysteresis. off hook is indicated (nstat = 0) if the loop resistance is a max- imum 3000 w . on hook is indicated (nstat = 1) if the loop resistance is a minimum 5000 w . ring trip the ring trip threshold is set by resistor r 10 in the resis- tor module. with r 10 set to 600 w , the circuit is guaran- teed to ring trip up to 1330 w . with a 20 hz ringing source, the trip time is guaranteed less than 200 ms. the ring trip circuit assumes use of battery-backed ringing. pretrip immunity is such that a load across tip and ring of 10 k w in parallel with a 6 m f capacitor will not cause ring trip. three external components are required for ring trip: a 1 m w resistor from rts to v bf ; resistor r 10 , which is a 600 w resistor from rsw to v bf ; and a 0.1 m f capacitor from rsw to rts. the components required for ring trip circuit are shown below. note that r 10 is implemented in the resistor module. all other components are discrete. 5-5276 (f) figure 9. ring trip threshold 600 w r 10 1 m rts rsw v bf 0.1 m f L7597
26 26 lucent technologies inc. advance data sheet march 1997 relay, and protector (srp) for short loop and ta-909 applications L7597 resistive subscriber line interface circuit (slic), ring applications (continued) thermal shutdown if the silicon temperature rises above a nominal 145 c, the L7597 will enter a thermal shutdown mode where all switches are off and the slic is in a state that is functionally equivalent to the disconnect state. relay driver the L7597 offers a single integrated relay driver. the relay driver output rdo is low (relay operated) when a low input on b3 is latched into the device. the driver has suf?ient driver capability to provide 70 ma with a 1.0 v drop and 20 ma with a 0.4 v drop. turn-off and turn-on times are a maximum of 10 m s. solid-state ringing access the L7597 offers solid-state ringing access switches for power ringing access and for the associated line break function. during the ringing state, unbalanced battery-backed power ringing is applied to the ring lead through resistors r 10 and r 1 via ringing access switch, sw3. the ring drive ampli?r of the L7597 slic is isolated from the subscriber loop via the inte- grated line break switch sw2 during the power ringing state. since the tip lead of the L7597 slic is tied to ground via resistor r 2 , no line break function is associ- ated with the tip lead. the return ground path for the power ringing signal is via r 2 . the line break switch, sw2, is implemented using a high-voltage mos transistor. this gives a linear v-i characteristic, as seen in figure 3. the on resistance of this switch is a nominal 50 w with a maximum 100 w . this switch is current limited to a nominal 35 ma and has a maximum off-state voltage rating of 320 v. the ringing access switch, sw3, is implemented using a pnpn type structure. this gives a linear v-i characteris- tic with an offset through the origin. the off-state volt- age rating is 500 v. surge current (10 m s x 1000 m s) through this switch must be limited to less than 2 a. steady state current through this switch must be limited to less than 150 ma. battery switch in order to minimize off-hook power consumption, the L7597 offers a battery switch feature. this feature is implemented using an integrated solid-state switch, sw1. the battery switch, sw1, has similar characteris- tics to the line break switch, sw2, including the 35 ma current limit. when sw1 is closed, the high-voltage battery is applied and any dc current from the high-volt- age battery will be limited by the current-limiting action of sw1. when sw1 is open, the high-voltage battery is isolated from the loop. the low-voltage battery is applied through the current-limit circuit. when the cur- rent-limit circuit is active, the low-voltage battery is applied to the subscriber loop and dc current will be limited to 25 ma. when the current-limit circuit is not active, the low-voltage battery is isolated from the loop. the state of sw1 is controlled via logic inputs b0?2. switch 1 determines if the high-voltage battery is applied to the loop. when sw1 is closed, the high-volt- age battery is applied to the loop and the dc current from the high-voltage battery will be limited by the cur- rent-limit action of sw1. when sw1 is open, the high- voltage battery is isolated from the loop. the low-voltage battery is applied to the loop when the current-limit circuitry is active, regardless of the state of sw1. if the current-limit circuit is not active, then the low-voltage battery is isolated from the loop.whenever the current-limit circuitry is active, current from the low- voltage battery is limited to 25 ma. the talk state is an example of this mode of operation. it is possible to have both the high-voltage and low-volt- age battery applied to the loop. in the high-battery talk state, the current limiter is active and sw1 is closed. thus, dc loop current is drawn from both batteries. the current from the high battery is limited to the current limit of sw1, 35 ma nominal, and the current from the low-voltage battery is limited to 25 ma by the current- limit circuit. thus, in this state, overall dc current is lim- ited to a nominal 60 ma. in ta-909, or other short loop application, typically the high-voltage battery is applied during scan and other on-hook states. this is to maintain compatibility with any existing standards for customer premises equip- ment. in ta-909, the minimum loop is 450 w . given this short loop range, the lower-voltage battery has suf? cient capability to ensure that 18 ma is fed to any loop in this range. thus, whenever the handset set goes off hook, in order to conserve power, operation is switched to the lower-voltage battery.
lucent technologies inc. 27 advance data sheet march 1997 relay, and protector (srp) for short loop and ta-909 applications L7597 resistive subscriber line interface circuit (slic), ring dc characteristics v-i characteristics resistors r 1 and r 2 are the dc feed resistors. r 1 is connected from battery to ring, and r 2 is connected from tip to ground. the dc loop current is fed to the subscriber loop via these resistors. in short loop appli- cations, to minimize power consumption, the lower- voltage battery is used to supply dc current to the subscriber loop and this current is limited by the inter- nal current-limit circuitry. in the talk state, the lower- voltage battery is applied to the loop and the dc cur- rent-limit circuitry is active. when the lower-voltage bat- tery is used, the loop length must be short enough such that the battery voltage less overheads is capable of supplying suf?ient dc loop current to allow for proper operation of the handset. typically a minimum 18 ma is required. in this mode of operation, the v-i template is restricted to short loop lengths and the cur- rent is limited to 25 ma for all allowed loop lengths. loop length the loop range when operating from the lower voltage battery in current limit is given by: r l = ({|v bat | ? ohlim }/i limit ) ?r 1 ?r 2 where r l is the dc resistance of the subscriber loop, speci?d in ta-909 as 450 w minimum. v ohlim is the overhead or drop associated with the current-limit circuit; typically 2.2 v i limit is the current-limit value (25 ma). | v bat | is the magnitude of the lower voltage battery; recommended 25.5 v. r 1 = r 2 = dc feed resistors = 200 w r l = ({25.5 v ?2.2 v}/0,025 a) ?200 w ?200 w = 532 w r l = 532 w 3 450 w ac design codec features and selection summary there are four key ac design parameters: n termination impedance is the impedance looking into the 2-wire port of the line card. it is set to match the impedance of the telephone loop in order to mini- mize echo return to the telephone set. n transmit gain is measured from the 2-wire port to the pcm highway. n receive gain is done from the pcm highway to the transmit port. n hybrid balance network cancels the unwanted amount of the receive signal that appears at the transmit port. at this point in the design, the codec needs to be selected. the discrete network between the slic and the codec can then be designed. below is a brief codec feature and selection summary. first-generation codecs these perform the basic ?tering, a/d (transmit), d/a (receive), and m -law/a-law companding. they all have an op amp in front of the a/d converter for transmit gain setting and hybrid balance (cancellation at the summing node). depending on the type, some have differential analog input stages, differential analog out- put stages, and m -law/a-law selectability. this genera- tion of codec has the lowest cost. it is most suitable for applications with ?ed gains, termination impedance, and hybrid balance. second-generation codecs this class of devices includes a microprocessor inter- face for software control of the gains and hybrid bal- ance. the hybrid balance is included in the device. ac programmability adds application flexibility and saves several passive components. it also adds several i/o latches that are needed in the application. it does not have the transmit op amp, since the transmit gain and hybrid balance are set internally. third-generation codecs this class of devices includes the gains, termination im- pedance, and hybrid balance?ll under microproces- sor control. depending on the device, it may or may not include latches. in the codec selection, increasing software control and ?xibility are traded for device cost. to help decide, it may be useful to consider the following: n will the application require only one value for each gain and impedance? n will the board be used in different countries with dif- ferent requirements? n will several versions of the board be built? if so, will one version of the board be most of the production volume? n does the application need only real termination impedance? n does the hybrid balance need to be adjusted in the ?ld?
28 28 lucent technologies inc. advance data sheet march 1997 relay, and protector (srp) for short loop and ta-909 applications L7597 resistive subscriber line interface circuit (slic), ring ac design (continued) design equations the following section gives the relevant design equa- tions to choose component values for any desired gain, termination, and balance network, assuming a complex termination is desired. complex termination will be speci?d in one of the two forms shown below: 12-3425(f) figure 10. equivalent complex terminations both forms are equivalent to each other, and it does not matter which form is speci?d. the component values in the interface circuit of figure 10 are calculated assuming the parallel form is speci?d. if the termina- tion impedance to be synthesized is speci?d in the series form, convert it to the parallel form using the equations below: note that if the termination impedance is speci?d as pure resistive: de?e the gain constant, k, as follows: where, |z t | 1 khz is the magnitude of the complex termination impedance z t being synthesized, calculated at 1000 hz. this equation assumes that the tlp of the codec is 0 dbm referenced to 600 w . the following equation applies when referring to figure 10: where, w = 2 p| | = 1000 hz cr 1 r 2 is de?ed per figure 10 (series form), and r1 r2 c r2 r1 c (series form) (parallel form) r 1 r 1 r 2 + = r 2 r 1 2 r 2 r 1 + r 2 ------------------------------ - = c c 12 r 1 r 2 ------ - r 1 r 2 ------ - ? ?? 2 ++ ------------------------------------------ - = r 2 r 2 0 and c = c ~ == = r x = desired receive (or pcm to tip/ring) gain in db t x = desired transmit (or tip/ring to pcm) gain in db k rcv k 0 10 rx/20 for receive gain = k tx 1 k 0 ------ 10 tx/20 for transmit gain = k 0 z t 1 khz 600 ------------------------- - = = power transfer ratio z t w 2 c 2 r 1 r 2 2 r 1 r 2 j w r 2 2 c ++ 1 w 2 r 2 2 c 2 + -------------------------------------------------------------------------------------- - = z t w 2 c 2 r 1 r 2 2 r 1 r 2 ++ 1 w 2 r 2 2 c 2 + ----------------------------------------------------------- ? ? ?? 2 w r 2 2 c 1 w 2 r 2 2 c 2 + ---------------------------------- - ? ? ?? 2 + =
advance data sheet march 1997 lucent technologies inc. 29 relay, and protector (srp) for short loop and ta-909 applications L7597 resistive subscriber line interface circuit (slic), ring ac design (continued) design equations (continued) 12-3429 (f).r3 figure 11. initial ac interface for complex termination between L7597 slic and t7504 codec note: dc blocking capacitor (c b ) not shown, c t and c r separate v rn receive interface + r t2 r rv2 r hb1 r gx g sx vfxin vfro 1/4 t7504 codec z t/r + v t/r i t/r +2.4 v c r 1/2 L7597 r gx1 r rv1 c t r t1 z irp + ax v xmt l rp v rn xmt i rp pt pr v bat ts rs v bat r 1 r 2 c 1 resistor module 200 k w 200 k w 100 k w 200 w 200 w 100 k w 1 k w 1 k w the tip/ring differential current is given by: the voltage at pin xmt is given by: the component values in the ac interface of figure 11 are calculated (for the transmit and receive gains de?ed by the respective gain constants k rx and k rcv , and for the termination impedance seen in figure 10) using the following equations: the 200 w feed resistors contribute 400 w to the termi- nation impedance. the termination impedance associ- ated with the circuit in figure 11 consists of this inherent 400 w feeding impedance in parallel with: n a negative impedance, where, n and a positive impedance, where, the negative and positive impedance terms are used to adjust the termination impedance from the inherent 400 w to any complex termination. i t/r 200 i rp v rn z irp ----------- ? ?? = v xmt v t/r 2 ------------- - = r rv1 100r 1 k rcv ------------------ - = r rv2 100r 2 k rcv ------------------ - = c r k rcv c 100 ------------------- - = r gx1 r gx1 r t1 + ----------------------------- - r rv1 100 ------------- 1 400 --------- - 1 r 1 -------- ? ?? = 400 w = 2 x 200 w feed resistors r gx 2 *k tx r gx1 r t1 + () = c t c 100 --------- -1 r gx1 r t1 ------------- 1 100r 1 r rv1 ------------------ - + ? ?? + = r t2 r 2 c c t -------------- - = 2 100 --------- - x r gx1 r gx1 r t1 + ----------------------------- - r t2 1 j w c t ------------- - + ? ?? ? r gx1 r t1 + r t1 ----------------------------- - ? ??
30 lucent technologies inc. advance data sheet march 1997 relay, and protector (srp) for short loop and ta-909 applications L7597 resistive subscriber line interface circuit (slic), ring ac design (continued) design equations (continued) 12-3426(f).r3 figure 12. revised ac interface c t and c r combined into a single capacitor c s xmt r t2 c t irp c r v fro r rv2 xmt r t2 irp c s = c t + c r v fro r rv2 r rv1 r rv1 using the circuit of figure 11, the ratio of capacitors c t and c r will affect the gain ?tness (transmit and receive), and to a lesser degree the return loss of the line circuit. thus, depending on the requirements, c t and c r may need to be tight tolerance capacitors. if this is the case, capacitors c t and c r may be com- bined into a single capacitor with a looser tolerance. this is illustrated in figure 12. to scale c s (higher), increase c t (and decrease r t2 ) by increasing the r gx1 / (r gx1 + r t1 ) ratio by rearrang- ing the circuit in figure 11 and by adding resistor r sc from xmt to irp as shown below: 12-3427(f) figure 13. addition of resistor r sc from xmt to irp then, once the gains and complex termination are set, if the hybrid balance network is identical to the termination impedance, then the hybrid balance is set by a single resistor (shown in figure 11) and is computed as fol- lows: the L7597 slic is ground referenced. however, a +5 v only codec, such as t7504, is referenced to +2.5 v. the L7597 slic has suf?ient dynamic range to accommo- date an ac signal from the codec that is referenced to +2.5 v without clipping distortion. furthermore, a dc current will ?w between the L7597 slic and +5 v only codec. with the L7597 slic, this current will not affect ac performance, but it does waste power. to avoid wasted power consumption, blocking capacitors can be added. capacitors should be placed to block any path from any low-impedance +2.5 v biased node on the t7504 codec (or other +5 v only codec) to the slic. a blocking capacitor (c b ) has been added in the applica- tion drawing in figure 13. after the blocking capacitor c b is added, the above component values may have to be adjusted slightly to optimize performance. the effects of the blocking capacitor are best evaluated and optimized by circuit simulation. contact your lucent technologies microelectronics group account representative for information on availability of a pspice * model. * pspice is a registered trademark of microsim corporation. r t1 r sc irp c t r t2 xmt vrn r gx1 c b r gx1 r gx1 r t1 + ----------------------------- - r rv1 r sc || () 100 ------------------------------------ - 1 600 --------- - 1 r 1 --------- ? ?? r rv1 r rv1 r sc + ------------------------------ + = r hb r gx k tx k rcv ----------------------------- =
lucent technologies inc. 31 advance data sheet march 1997 relay, and protector (srp) for short loop and ta-909 applications L7597 resistive subscriber line interface circuit (slic), ring ac design (continued) design equations (continued) as a practical design example, design the interface for the following set of requirements per ta-909. rx = ? db tx = ? db zt = 600 w ? (r 1 = 600; r 2 = 0; c = ) hy = 600 w thus: r 1 = 600 w r 2 = 0 c = calculate the gain constants: k o = = 1. k rcv = k o 10 rx/20 = 1 x 10 ?/20 = 0.631 k tx = 10 tx/20 = 1 x 10 ?/20 = 0.794 calculate individual components: r rv1 = = 95.1 k w using a standard value component: r rv1 = 95.3 k w r rv2 = = 0 c r = = choose r gx1 = 82.5 k w r t1 = 21.4 k w using a standard value component: r t1 = 21.5 k c t = c t = r t2 = = 0 r gx = 2 x k tx (r gx1 + r t1 ) r gx = 2 x 0.794 (82.5 + 21.5) = 165.2 k w using a standard value component: r gx = 165 k w r hb = r hb = using a standard value r hb = 332 k w . therefore, for this design example, use the following values in the circuit shown in figure 11. r t1 = 21.5 k w r t2 = 0 r gx = 165 k w r gx1 = 82.5 k w r rv1 = 95.3 k w r rv2 = 0 r hb1 = 332 k w c t = c r = figure 14 is the application circuit with the above values. z t 1 khz 600 --------------------------- - 600 600 ---------- - = 1 ko -------- 100r 1 k rcv -------------------- - 100 600 0.631 ---------------------------- = 100 r 2 r rcv ---------------------- - k rcv c 100 ---------------------- r gx1 r gx1 r t1 + -------------------------------- r rv1 100 -------------- 1 400 ---------- - 1 r 1 --------- ? ?? = 82.5 k w 82.5 k r t1 + --------------------------------------- - 95.3 k w 100 ----------------------- 1 400 ---------- - 1 600 ---------- - ? ?? = c 100 ---------- - 1 r gx1 r t1 -------------- - + 1 100 r 1 r rv1 ---------------------- - + ? ?? r 2 c c t ---------------- r gx k tx k rcv ----------------------------- 165 k w 0.794 0.631 ----------------------------------- 329 k w =
32 lucent technologies inc. advance data sheet march 1997 relay, and protector (srp) for short loop and ta-909 applications L7597 resistive subscriber line interface circuit (slic), ring ta-909 application diagram in the following diagram: rx = ? db tx = ? db zt = 600 w hy = 600 w 12-3334.a (c) * optional to improve v batl psrr by 6 db. figure 14. ta-909 application diagram rs 31 pr 22 200 k w 1 k w ring tip f1 f1 +5 a 0.1 ? 5, 26 2, 27 agnd v cca dgnd k1 0.1 ? 14 13 v dd dg 15 +5 d ce b0 b1 b2 b3 cs nstat 12 11 10 9 8 7 6 parallel data interface to control logic rcvn ircv rgbn vfx 165 k w 82.5 k w 21.5 k w gsx(n) vfxin(n) vfro(n) 32 1 4 95.3 k w 20 k w 1/4 t7504 50 k w * 47 pf* fgnd 21 (fault ground) v bath 21 25 v batl 0.1 ? 0.1 ? v bath (?8 v) v batl (?5.5 v) (office battery) v rng 18 v rng (ringing supply) 5.11 k w cbn 3 0.1 ? 301 k w 0.01 ? 0.1 ? clim 24 1 m w rts 16 0.1 ? rsw 17 600 w vbf 20 200 w 100 k w ts 30 pt 23 200 k w 1 k w xmt 29 100 k w vfx 200 w 0.1 ? L7597 resistive slic rdo 332 k w resistor module resistor module
lucent technologies inc. 33 advance data sheet march 1997 relay, and protector (srp) for short loop and ta-909 applications L7597 resistive subscriber line interface circuit (slic), ring outline diagram 32-pin plcc dimensions are in millimeters. 5-3813 (c) 0.10 seating plane 0.38 min typ 1.27 typ 0.53 max 3.56 max 1 4 30 5 13 21 29 14 20 12.57 max 11.51 max pin #1 identifier zone 15.11 max 14.05 max
advance data sheet march 1997 relay, and protector (srp) for short loop and ta-909 applications L7597 resistive subscriber line interface circuit (slic), ring for additional information, contact your microelectronics group account manager or the following: internet: http://www.lucent.com/micro u.s.a.: microelectronics group, lucent technologies inc., 555 union boulevard, room 30l-15p-ba, allentown, pa 18103 1-800-372-2447 , fax 610-712-4106 (in canada: 1-800-553-2448 , fax 610-712-4106), e-mail docmaster@micro.lucent.com asia pacific: microelectronics group, lucent technologies singapore pte. ltd., 77 science park drive, #03-18 cintech iii, singapore 118256 tel. (65) 778 8833 , fax (65) 777 7495 japan: microelectronics group, lucent technologies japan ltd., 7-18, higashi-gotanda 2-chome, shinagawa-ku, tokyo 141, japan tel. (81) 3 5421 1600 , fax (81) 3 5421 1700 for data requests in europe: microelectronics group dataline: tel. (44) 1189 324 299 , fax (44) 1189 328 148 for technical inquiries in europe: central europe: (49) 89 95086 0 (munich), northern europe: (44) 1344 865 900 (bracknell uk), france: (33) 1 41 45 77 00 (paris), southern europe: (39) 2 6601 1800 (milan) or (34) 1 807 1700 (madrid) lucent technologies inc. reserves the right to make changes to the product(s) or information contained herein without notice. no liability is assumed as a result of their use or application. no rights under any patent accompany the sale of any such product(s) or information. copyright ?1997 lucent technologies inc. all rights reserved printed in u.s.a. march 1997 ds97-125alc printed on recycled paper ordering information device part no. description package comcode attL7597bau-d resistive slic, ring relay, and protector for short loop and ta-909 applications 32-pin plcc (dry-bagged) 107874802 attL7597bau-dt resistive slic, ring relay, and protector for short loop and ta-909 applications 32-pin plcc (tape and reel, dry-bagged) 107861155

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